001    /*
002     *  This file is part of the Jikes RVM project (http://jikesrvm.org).
003     *
004     *  This file is licensed to You under the Eclipse Public License (EPL);
005     *  You may not use this file except in compliance with the License. You
006     *  may obtain a copy of the License at
007     *
008     *      http://www.opensource.org/licenses/eclipse-1.0.php
009     *
010     *  See the COPYRIGHT.txt file distributed with this work for information
011     *  regarding copyright ownership.
012     */
013    package org.jikesrvm.compilers.opt.regalloc.ia32;
014    
015    import org.jikesrvm.ia32.RegisterConstants;
016    
017    /**
018     * This class holds constants that describe IA32 physical register set.
019     */
020    public interface PhysicalRegisterConstants extends RegisterConstants {
021    
022      /*
023       * Types of values stored in physical registers;
024       * These affect instruction selection for accessing
025       * the data
026       */
027      byte INT_VALUE = 0;
028      byte DOUBLE_VALUE = 1;
029      byte FLOAT_VALUE = 2;
030      byte CONDITION_VALUE = 3;
031    
032      /*
033       * There are different types of hardware registers, so we define
034       * the following register classes:
035       * NOTE: they must be in consecutive ordering
036       * TODO: Kill this?
037       */
038      byte INT_REG = 0;
039      byte DOUBLE_REG = 1;
040      byte SPECIAL_REG = 2;
041      byte NUMBER_TYPE = 3;
042    
043      /*
044       * Derived constants for use by the register pool.
045       * In the register pool, the physical registers are assigned integers
046       * based on these constants.
047       */
048      int FIRST_INT = 0;
049      int FIRST_DOUBLE = NUM_GPRS;
050      int FIRST_SPECIAL = NUM_GPRS + NUM_FPRS;
051    
052      /** special intel registers or register sub-fields. */
053      int NUM_SPECIALS = 12;
054      /** AF bit of EFLAGS */
055      int AF = FIRST_SPECIAL + 0;
056      /** CF bit of EFLAGS */
057      int CF = FIRST_SPECIAL + 1;
058      /** OF bit of EFLAGS */
059      int OF = FIRST_SPECIAL + 2;
060      /** PF bit of EFLAGS */
061      int PF = FIRST_SPECIAL + 3;
062      /** SF bit of EFLAGS */
063      int SF = FIRST_SPECIAL + 4;
064      /** ZF bit of EFLAGS */
065      int ZF = FIRST_SPECIAL + 5;
066      /** C0 bit of EFLAGS */
067      int C0 = FIRST_SPECIAL + 6;
068      /** C1 bit of EFLAGS */
069      int C1 = FIRST_SPECIAL + 7;
070      /** C2 bit of EFLAGS */
071      int C2 = FIRST_SPECIAL + 8;
072      /** C3 bit of EFLAGS */
073      int C3 = FIRST_SPECIAL + 9;
074      /** ST0 - top of FP stack (for SSE2) */
075      int ST0 = FIRST_SPECIAL + 10;
076      /** ST1 - below top of FP stack (for SSE2) */
077      int ST1 = FIRST_SPECIAL + 11;
078    }